[sdiy] expo accuracy? or integrator accuracy?, or both?

[Ian Fritz]

Martin --

You raise good issues here.  If you will look at the information on my web 
site you will see that I have been concerned with this topic also, and have 
some results and techniques that may be of interest.

My procedure for making a VCO track is to begin by running  the core 
circuit (integrator plus reset) alone, using a resistor to a reference 
voltage as the current source.  I use the same reference source and same 
type of resistor as generates the standing current in the full unit, 
thereby characterizing the core and the standing current source together.

A temperature run at a middling frequency (1 kHz, say) usually reveals a 
drift in the core of several hundred ppm/K.  This drift can be compensated 
(to first order) in a number of fairly obvious ways.  My favorite is to 
make the reset trip point slightly temperature dependent by using an 
appropriate combination of carbon film and metal film resistors in the 
voltage divider that defines the trip point.

Once compensation is achieved at one frequency, other frequencies can be 
checked by changing the value of the current-source resistance.  What I 
have found is that there is indeed some extra drift at other frequencies, 
undoubtedly due to some or all of the effects you mention.  Generally, 
however, I have found these effects fairly small. It is hard to measure 
drift values below 200 ppm/K, but I think overall core drift is under 100 
ppm/K once compensated at a single frequency (and provided you don't go to 
extreme temperature variations).

More comments follow inline:

>An expo vco has at least two components:
>expo current converter and integrator.
>The expo converter is always pretty much the same
>structure, the integrator can come as analog computer
>integrator (feedback) or simple capacitor with buffer.
>
>There are some published results from such vcos
>(EN as well as WWW). The problem is that they
>treated both components together (aka vco), most of
>them stated that they couldn't really understand
>why the vco was going sharp or flat or strange in that
>particular way, it remained open.

Yes, I agree. One major source of this strangeness is that the drift of the 
core and of the converter have different functional forms, so there is no 
way to compensate both just by adjusting the converter response.

>A few mails ago there was a thread about what transistor
>pair should be used.
>There is much writing about expo converters, tempcos etc.
>I will not bore you to death with that.
>But what about the integrator?
>How can one say that this or the other transistor pair
>is sufficient if the error source can not be distinguished?

Absolutely. That is why I asked the question here just a couple of weeks 
ago as to what would be a good way to measure transistor log conformance 
directly.

>The integrator can have the following problems:
>-capacitor dielectric absorption
>  (this is ugly, because it is different for different
>   circuits and frequencies, so component manufacturers
>   can not spec it. It is what I understand least.
>   Polystyrene, polypropylene
>   tend to have low absorption, I have seen that by experiment,
>   but different brands
>   are different, I thought that mica was good, but
>   Bob Pease published that it isn't)
>   Anyway, it can make the integration slower, by 0.1% - 1%.

What is the objection to mica? I have never understood that. Cornell 
Dubilier specs some units at 25 ppm/K drift.  The good "pure India ruby 
muscovite mica" units cost several dollars.  Other grades may be inferior.

In addition to the absorption (dissipation) effect you note, there can also 
actually be hysteresis or memory effects.

>-limited gain of amplifier
>  (this is easier to understand, the inverting integrator
>  circuit will get slower if gain goes down. Gain can go
>  down with heat, lower supply,
>-offset voltage (fortunately no issue)
>-amplifier input bias current (easy to understand,
>  steals current, will get worse with temperature,
>  leads to shift of some Hz down, parts with less then
>  30pA are expensive and sometimes slow)

Yes, increases with temperature are quite dramatic. Watch for specs given 
at just room temperature vs. those given over a range when comparing 
integrators.

>-dominant pole of amplifier (most compensated amplifiers
>  will have a pole at ~ 10Hz, with -20dB per decade, substantial!)
>-output resistance of amplifier (inverting integrator)
>-other sources of leakage (reset, sync)
>
>I do not know yet, but I feel that the total integrator
>error can be substantial and it could be that it can
>be of the same magnitude than expo source error.

Yes, and it can even be larger. The expo source error is (I remind yet 
again) proportional to deltaVbe and so can be quite small over a limited 
frequency range, even if the converter is not properly compensated. In that 
regime the core drift can easily dominate.

>I do not need to mention that said effects introduce
>also temperature dependency into the system, this is certainly
>important for leakage and absorption.
>
>Since some of the effects are not really observable or
>can not be manipulated in experiment, I thought it would
>help to set up a simulation model. I know that (non)linear
>differential equation solvers of the SPICE type have problems,
>but very soon we have third order (amplifier with single pole,
>integration cap with soakage cap), this is very cumbersome
>to solve with analytic methods.

Good luck with that! Please keep us posted on your results.

>What's up with Martin Czech, is he ill to ask such questions?
>No, he's just curious.

And maybe he wants a high-performance, low drift VCO?

>And he wants to measure the performance
>of the japanese dual transistors (finally) with a current
>integrator and he wants to know how much error the measurement
>instrument will possible have. If it's about 1% it will be useless.

One idea I have been thinking about is to switch different cap values (of 
the same type, of course) in the core so that the conformance (Oct/V) 
measurement is always made at the same frequency. This would avoid reset 
errors.  Leakage could be a problem, but this could be handled by taking 
the low current data at a higher frequency, and overlapping the two data sets.

   Ian