[sdiy] Additive/Subtractive synthesis?

Tue Apr 22 00:42:58 CEST 2003

Ware the 4060 RC oscillator...

It is not terribly stable with voltage, temperature, ect.

If you really want to generate LOW frequencies, the capacitor
size will get way too large to be practical... or the resistor
values too large (or both)...

The 4060 is good to generate long time delays etc...

Also... watch out, there are missing 'taps' in the 4060..
it goes Q1, Q4 ....

Overall its a very useful chip, but not audio-oscillator
stable IMHO...

H^) harry

--------Original Message--------  

From: nej22 at hermes.cam.ac.uk
To: "izx at xizx.net" <izx at xizx.net>
Cc: synth-diy at dropmix.xs4all.nl
Sent: Apr 21 2003 20:57
Subject: Re: [sdiy] Additive/Subtractive synthesis?

>Hi,
>> >>>Yes, but IIRC the DACs are in the signal path.  It'd be better to build a
>> simple OTA-based state-variable filter and generate the CVs from DACs.
>>
>> Hmm...that's 8 DACs, at about $5 a pop. Once again, the real world intrudes
>> as we're limited (damn!) to a certain budget.
>Or....one DAC for frequency, one for Q, connected to as many voice cards
>as you need.  Since you know the frequency offset between each card, just
>add a small offset to each one to shift the filter response up or down a
>bit.
>Alternatively, make a cheap DAC from a PWM counter, and filter the output.
>Very cheap indeed, and probably good enough for this application.
>> One of the aims is to make this project modular, so if the deadline
>> looms ahead, and we're still tinkering with stuff,
>Good idea :-)
>Start with the oscillators, as stuff that makes a sound is so much more
>fun than filters or envelope generators.  And so much better at annoying
>your classmates.
>> >>>>Well, if your base signals are digital, whu not make a very simple
>> digital low-pass FIR filter with a shift register and some resistors?
>> Then you could modify the cut-off frequency by varying the clock
>> frequency.
>>
>> I'm actually taking DSP next semester, and I've heard (vaguely) of
>> Z-transforms and the like, but I don't know about any hardware
>> implementations of F/IIR filters *without* a DSP. Could you elaborate a
>> little on how to rig up a shift reg to do that?
>In this instance the trick works because your input signals are digital
>(in general this is not the case...).  An FIR filter is basically a string
>of delay elements (z^-1), and the output is the sum of each output
>multiplied by some coefficient.
>So, take your shift register (in effect, a 1-bit sampler) and sum each
>output through different resistors.  The impulse response of the FIR
>filter is the same as an ideal filter but sampled at the sampling
>interval.  I'm assuming you know the impulse response of an ideal low-pass
>filter... think "sinc".
>Now, the cut-off frequency is controlled by (a) the coefficients, and (b)
>the clock frequency (which needs to be much higher than the input
>frequency to avoid aliasing effects).  So you can change the filter
>response by changing filter clock frequency.
>Ok, its not perfect (in fact, downright crude), but its a good first
>approximation :-)
>> >>>>Why not then implement a top-octave divider (ask Tim Ressel about this
>> That was one of the first ways to synthesize each note I looked into. The
>> problem, again, was price...
>I'm sure Tim could "do you a deal", and I believe his chip can generate
>all twelve notes, so you'd only need _one_ chip, rather than twelve.
>> small quantities. The '4060 (which I'm gonna use), is about 30 cents in
>> comparison, has a built-in ext-RC oscillator (which, I figure I could get
>> to about 880 Hz
>Oh, much faster.  The medium speed grade devices can run upto 8MHz at 10V
>(3MHz at 5V).  Heck, even my old Jen SX1000 uses a 74LS221 for is 2MHz
>master clock, all done in R and C for that vintage "classic analogue"
>warmth!
>Have fun!!!
>Neil
>--
>Neil Johnson :: Computer Laboratory :: University of Cambridge ::
>http://www.njohnson.co.uk          http://www.cl.cam.ac.uk/~nej22
>----  IEE Cambridge Branch: http://www.iee-cambridge.org.uk  ----