[sdiy] uA726 transistor array

[Scott Bernardi]

The other advantage of dielectric isolation is that you can create both "n" and
"p" tubs, so you can make pnp transistors that are the same vertical structure
(i.e., not lateral) as the pnp's. Lateral pnp transistors are horrible - low Early
voltage, high rb and re, Beta rolls off fast with current, and slow!  THAT-120's
are "good" pnp types (although a pnp transistor will never be quite as good as an
npn do to the lower mobility of holes than electrons).
If the new brand of THAT transistors are going to be junction isolated, I wonder
if they will be providing a decent pnp array? You'd have to invert all the layers
- n type substrate, p type epitaxial layer, etc.

Ian Fritz wrote:

> At 03:17 PM 10/13/2002, patchell wrote:
> >     I can only speak of my own experiences with using heated chips...I
> > was never
> >satisfied with the performance I got...then again...I may have not done it
> >correctly.
> >
> >     The only difference between the THAT 1xx series of transistor arrays and
> >others is that they used dialectric isolation.  I don't know what problems
> >this
> >might create or how it might perform thermally.  As far as I know, the new
> >THAT
> >2xx series is going to be juntion issolated, or at least, that is what I
> >thought
> >I read about them.
>
> Interesting point.  But unless the devices are dielectrically isolated from
> the substrate, the high thermal conductivity of Si should keep the
> temperature very uniform.