[sdiy] I'm an idiot, right?

[fmg]

hope this will not arrive too late

Not the rule of thumb but useful in some cases..

Vcc= voltage at Collector rail in bjt output stages (as
     in ttl 74xx series). Positive over ground or related
     to Vee (ie: 5V)
Vee= Emmiter ref voltage for bjt output stages (ttl). Ground
     or negative related to Vcc
Vdd= voltage at Drain rail in fet output stages (as in
     4000 cmos series) Positive related to Vss (ie: 12V)
Vss= potential level of Source for fet output stages. (as in
     cmos 4000 series) Ground or negative related to Vdd.

If Vcc (or Vdd) is grounded then Vee (or Vss) must be at a
negative potencial. Probably useful in a sort of digital level
converting schema.

Fabio

Peter Grenader wrote:
> 
> Peoples,
> 
> happy Fourth of Jul...whoops...THANKSGIVNG to you all.
> 
> CMOS reality check:
> 
> VSS= +3 thru 15; VCC=ground
> 
> right?
> 
> On a 4050B, pin 1 sis Vcc and should be ground, pin 8 is Vss and should be
> +12 volts, right?  this should work, right?
> 
> I got confused with Vcc (which pin 1 is marked and was thinking TTL, and
> reversed the power and ground.  I've tried 4 chips, perfectly acceptable
> fluxuating signal is going into the buffers, all outputs on all buffers stay
> high, regardless of input condition.
> 
> So, before I re-wire all the supply and ground lines (there are four of
> these buffers in the circuit Im making), i just wanted to check...
> 
> i had it reversed, right?
> 
> HEEEEEEEELP.
> 
> Peter
> 
>