[sdiy] 303 sequencer (was: a different kind of slide)

[media.nai at rcn.com]

At 10:14 PM -0500 03/18/02, Byron G. Jacquot wrote:
>
>>Then why does the slide output of the uP go to the clock input of the hex
>>latch??
>
>Economy of microprocessor output pins (again, economics driving the 303
>design).  By using some tricky timing characteristics, they were able to
>>get two uses out of one pin.

According to the schematics, pin 31 of the uP is labeled "pitch data latch
strobe" and is connected to three places: pin 9 of the 7174 hex latch, pin
11 the clock input of a 4013 (type D flip-flop with SR) which goes to the
accent circuit, and the transistor circuit controlling the 4066 which
switches the slide capacitor (this connection is labeled "slide on/off").

On the block diagram, it shows the same connection, with an output of the
uP going to the same three circuits.  There it is labeled as "PE" (Port E),
but pin 31 is described as being part of Port I (the same group as the
"gate signal") in the uP's "functional description".  So there is at least
that slight error.

>If you quickly pulse that line, you'll latch a new
>value into the DAC, and induce a breif moment of glide.  If you hold that
>line, you'll get the new value into the latch, and switch in the glide
>>circuit.

Perhaps I need better information for the MC14174B, but from what I have,
and everything I know about flip-flops, the outputs would only pass to the
inputs to the outputs on a rising clock.  That doesn't make much sense
looking at the TB-303 schematics, where the "pitch data latch strobe" and
"slide on/off" are shown as having the exact same value.

>It would be very interesting to see how the slide signal relates
>to the gate input.  It'll bet they're both quantized to the same
>16th note steps.

Perhaps the slide is dropped a bit early so that the slid note always
arrives before the new note.  I haven't tried taking the slide output of
the uP and seeing when it ends, or using it to control an external lag
processor.