[sdiy] MS 20 circuit theory

jhaible jhaible at debitel.net
Sat Jun 22 13:40:41 CEST 2002


This is how I understand it:
A thyristor is built from an npn and pnp transistor.
Anode is tied to positive supply. Gate is tied to fixed
voltage. When Kathode voltage goes below Gate
voltage, thyristor fires.
Integrator is built from current source (expo converter
output, with its output resistance further increased
by a FET to form a cascode) and a capacitor.
Capacitor is tied to positive supply, so the voltage at its
other end is ramping *down* because of the current source.
(Voltage *across* capacitor is ramping up, of course)
Thyristor is connected across capacitor, fires every time
the capacitor voltage crosses the threshold (see above).
Once fired, the thyristor completely discharges the capacitor.
It will only stop to conduct when there is (almost) no more
current flowing. Then the ramping down starts again.
The components around the thyristor do some temperature
compensation for the trigger threshold, and they are introducing
some controlled leakage, so the thyristor won't be kept
conducting by the mere expo genererator output current.

JH.


-----Ursprüngliche Nachricht-----
Von: Default Jamerson <defaultjamerson at yahoo.co.uk>
An: <synth-diy at dropmix.xs4all.nl>
Gesendet: Samstag, 22. Juni 2002 10:54
Betreff: [sdiy] MS 20 circuit theory


> Dear List
> Does anyone know if anyone has done a write up
> on the MS20, esp. the the VCO's.
> I've got the schematics, I'm looking, looking,
> looking...
> Bits and piece make sense, but I feel I'm missing
> something in those VCO's.
> This is quite sad for someone just about to finish a
> TAFE electronics course.
> Got Martin's explaination of the f-v convertor from
> the
> archives, which was nice.
> thanks
> Macrus
>
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