[sdiy] wanting "good" envelopes, not "bad"

Grant Richter grichter at asapnet.net
Wed Jun 12 21:15:24 CEST 2002


> Zipper noise is probably the biggest problem I can think of.  In order
> to keep the zipper noise down, you with either need a high sampling rate, or
> a filter.
> 

I was thinking about trying a hardware envelope generator with a digital
integrator. If we use a 12 bit counter feeding a DAC, we get 2.4 millivolt
steps. That's 3 cents per step driving a 1 volt per octave input over 10
volts.

Using an up-down counter, we just need to send a high frequency VCO to the
count terminal. The oscillator in a simple CD4046 goes into the MHz range,
and I tested a 74HC4046 up to 45 Mhz. An analog multiplexer can be used to
route the correct voltage to the VCO for the appropriate envelope phase.
A 1 millisecond attack would take a 4.096 Mhz clock frequency, which even a
CD4046 should be able to do.

So voltage sources controlling a VCO take the place of timing potentiometers
and a counter and DAC take the place of the capacitor. The up/down direction
pin on the counter can be driven by a simple set reset flip-flop and voltage
comparator like the analog version.

While more complex than the analog version, you could loop it interesting
ways, or use the counter as address bits to a RAM or PROM for complex
envelope curves and shapes (horn blips????). Also the segments are
inherently voltage controllable.




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