[sdiy] FPGA digital audio

[Jay Schwichtenberg]

I did sound cards for a while and we used Altera FPGAs as our 'SoundCache'
controller. We had a card that interfaced directly to the ISA bus via the
FPGA and cards that went through a PCI controller to a FPGA. The FPGA would
handle the transfer of data to/from system buss to cache and to/from cache
to the converters and all the stuff in between (timers, interrupts). At
first our routes were taking about 8 hrs for the ISA controller. With better
tools and faster computers we got that down to about 1-2 hrs for the PCI
designs. On the ISA card we had a EEPROM that we could reprogram once it was
programmed through the FPGA. For the PCI cards we had enough I/O bits in the
PCI controller where we could program the FPGA from the driver on startup. I
did a little of the coding in AHDL (Altera's version of VHDL) but not much,
we had a hardware guy do that. I think that the advantage that the hardware
guy had over me (software guy with good EE skills) was that he knew how to
optimize the design. In reallity I view software pretty much the same as
VHDL code. All the logic, state machines and asynchronous issues I've had to
deal with in realtime software only not quite as fast.

The things that I learned from doing those have pretty much been discussed.

* Start with a bigger piece (more logic/ram) than you think you'll need
which is pin compatible with smaller ones. You can down size when you go
from proto to production. Cost maybe an issue, but it becomes a mute point
if you can't get it to work.
* Always save a few pins for debugging. You have 10000 gates in a package
and if you can't see what is inside to debug it you're hosed. (Give me the
days where I can put my scope on bit 6 of a flip chip accumlator.)
* Yes use the auto-router in the software. You get into a real big bucket of
worms (more like a 50 gallon drum) if you have to hand optimize/route a
chip.
* Always give yourself some way of field programming the FPGA or FPGA ROM.
There will always be something to fix or modify. Some people might argue
this, but unless your doing something trivial I'll stand my ground on this.
If you are doing a onesie/twosies design you'll probably spend more on OTP
parts than you will a reprogrammable part to get it right. There are a
number of ways to do this. Make sure you can reprogram the parts you need
before you commit. Some have proprietary programming interfaces or
interfaces speced so poorly you may not be able to figure out how to program
them. Usally they are more than willing to sell you an expensive programmer.
I've had very bad experiences with Xilinx EEPROMs and their JTAG specs.

Happy VHDLing in 2002.
Jay

> -----Original Message-----
> From: owner-synth-diy at dropmix.xs4all.nl
> [mailto:owner-synth-diy at dropmix.xs4all.nl]On Behalf Of patchell
> Sent: Saturday, January 05, 2002 11:02 AM
> To: 'Synth DIY List'
> Subject: Re: [sdiy] FPGA digital audio
>
>
>     Faster computers help as well.  I had one design that took 2 hours to
> route.  I needed to add a little bit to it, and then it two about
> 8 hours to
> route.  I went from an old Pentium I 90 to a Pentium III 750 (or
> something like
> that), and the routing time went down to 5 minutes....
>