[sdiy] PIC16F84 ASM TMR0/Prescaler delay question

[The Old Crow]

On Wed, 2 Jan 2002 trevor at resonance.fsnet.co.uk wrote:

> On PIC16F84 devices, TMR0 isn't a down counter - it increments.
> Interrupt occurs on overflow from FFh to 00h. Therefore, writing a
> smaller value to the Timer0 register will actually result in a longer
> time delay (takes longer to count to FF). Therefore writing a value
> 1.25 x the original value won't work.

  Oops, my bad.  It has been too long since I did PIC asm (got used to PIC 
C).  Here is a snip of code from something I did in 1997:

/* begin snippet */
st2_1   btfsc   GPIO,1          ;If low went away early, restart
        goto    st2_0
;
;  TMR0 will increment once every 16us (fclk=4MHz).  Loop must test TMR0
;  (movf affects the Z flag) within 16 cycles of each iteration.
;
        movf    TMR0,W          ;Check for 2ms elapsed
        btfss   STATUS,Z
        goto    st2_1

        movlw   -125            ;Reset 2ms timer
        movwf   TMR0
        incf    tickms,F        ;Tick off another ms

        btfss   tickms,4        ;Got to 32 x2= 64ms?
        goto    st2_1
/* end snippet */

  I used the knack of loading negative constants into the timer to account 
for its incremental nature.  It is Zilog Z8 MCUs (my usual stompinmg 
ground) that use decrementing timer/counters, thus my oversight.

  Now, given this, you can still multiply the -125 shown above by 1.25, 
obtaining -156.25, thsu I would use -156 and a few no-ops outside the loop 
to trim for the 0.25 and thus compensate for the clock speed increase.

Crow

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