[sdiy] fanning grounds vs. dirty/clean ground

René Schmitz uzs159 at uni-bonn.de
Mon Aug 19 19:25:10 CEST 2002


>>A good design philosophy is to run as little current thru the GND.
>
>Taking that a step further, it's a good idea not to run unnecessary current
>anywhere.

Right! 

>So are you saying use the inverting input of an op-amp as a virtual
>ground??    If ground was drawing so little current so that could work,
>would there be a problem in the first place??  Or do you mean using the
>output, and if so, how would you reference it??

I run a "reference" GND lead to the PSU, that is practically without current. 
(Ideally it would only be loaded by noninverting inputs of opamps...)
That is used as the voltage for a simple opamp voltage follower. The output 
now has some current capability (5-10mA, use a power opamp if you need more).
Of course that can only be used for ground nodes inside circuits. Never 
attach a jack to this "regulated" ground, external connections are tied to 
the direct unbuffered ground. I did it that way for some of my modules now,
and this works quite well.  (A couple VCO3s that now also have a seperate 
regulator for each module, so there is even no problem from the now noisier
supply rails.) Its of course best suited if one designs with that in mind,
so that one returns as little current to GND as possible.

>Another way of looking at it is by not decoupling to ground, you are
>carefully maintaining a clean sewer, at the risk of having a more
>contaminated water supply.

Right. My reasoning is that most opamps have a some PSRR, but a load 
referenced to a dirty ground will have _none_. Thus the somewhat noisier
supply is the smaller nuisance.

>I think some of these problems could be reduced by board placement.  If
>parts are grouped together onto different "buses", noise in one area is
>less likely to effect the other parts.  Place the signal grounds closer to
>the supply connection (where ground is closest to zero) or connect them
>with a wider, less resitive trace.  Run the op-amps off another "bus", and
>all the noisy digital chips near off yet another "bus".

Thats also a good idea.

>Also, perhaps one should choose parts that create less noise in the first
>place.  I'm not an EE, but it's my casual observation that supply noise is
>often related to dV/dt -- the faster, the noisier.  The application notes
>of slow DC-accurate op-amps barely mention decoupling, yet the application
>notes of audio op-amps (with blazing slew rates) go on and on about it like
>they were selling capacitors.  Fast logic is very noisy, but the CD4000
>series is slow and quiet.  This goes back to what Harry was saying about
>the "pipes" not being large enough to handle sudden changes.

Thats right. At high frequencies (i.e. high dI/dt) the inductance is your 
enemy, since U = L * dI/dt. Thus makeing things not as fast as possible, but
only as fast as necessary makes sense.

Cheers,
 René
-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159

 




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