[sdiy] SRAM like 5101

Theo t.hogers at home.nl
Thu Apr 11 21:54:28 CEST 2002


A uC with (internal) SRAM on a small board could emulate the obsolete parts.
Speed should not be no problem, the old memory was not "that" fast.
Maybe add one latch IC for the DOs, saves nearly half the needed IO pins.
The code could be quite simple, just a loop reading the "address lines" and
moving data to and fro the DO and DI accordingly.

Theo


From: <jhaible at debitel.net>
> >  SRAM design philosophy went to bidirectional data pins in the late
> >1970s, mostly due to pin-count reasons as the storage capabilities
> >increased.  A common 2Kx8 or 8Kx8 CMOS SRAM is recommended today for
> >retrofitting old memory, with a little extra logic to split the data
lines
> >into inputs and outputs if that is necessary.
>
> That's what I feared: I'd need to latch everything, get the right timing,
and so on.
> Then I'd rather have a friend make a "modern" uC design, with EEPROM
> even (to avoid the battery) and serial communication.
>
> But I try to find a solution that is close to the 3200 first.
>
> >  Do you have a schematic of the circuit that uses the 5101s?  I'd like
to
> > see what options can be tried.
>
> I have partial schemos (you can guess what parts analog-JH. has omitted
> when he made these copies some years ago (;.>) ), but I've ordered a
> full set of schemos from Korg.
>
> Meanwhile, as far as I understand it, they could really have separate
lines
> for everything, DI's are fed from ADC, DO's go directly to DAC.
> The only drawback was that they had to stack four 5101 chips
> (two for the 8-bit words, another two th eget 16 memory locations
> instead of 8.) So I was hoping for a chip that even avoids routing the
> adress lines to 4 chips. (;->)
>
> JH.




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