[sdiy] Sequ... (mistake!)

[René Schmitz]

Hi Jürgen and all!

I've made some experiments today with these staircase generators, the first 
finding was  that one needs to do some bias correction to prevent integration 
errors. (The input bias current makes the cap rise slowly, that gives an 
oscillation even without input pulses.) 

The circuit that I've used is the staircase generator on page 11 of the
LM3900 
datasheet. This makes two steps for one complete cycle of the clock input. 
(The diode between the inputs does that.) I notice that your circuit (and I 
assume the original) does that as well, it may be another hint.

I've sofar used another amp to make a comparator, and a monostable from two 
4093 NANDs. I figure it ought be possible to make the entire circuit arround 
one LM3900. One more amp as monostable (as in the Free running Staircase 
generator on page 12, tossing out the 4093) and the last amp used for the 
bias current correction.

Cheers,
 René


At 12:46 05.10.01 +0200, jh. wrote:
>Also, see the LM3900 data sheet. Lots of application examples,
>including a VC divider. Much lower component count than
>my version. I whished I had found this before I designed mine.
>(I only had a verbal description from a Serge catalogue. In
>retrospect, knowing Serge's fondness of the 3900, the data
>sheet version might be much closer to the "original" than my
>circuit. I've never seen the Serge module in question, nor
>schemos, so this is just guessing.)
>
>JH.
>
>
>
-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159