[sdiy] 4069UB based CV-ADSR

[René Schmitz]

Hi Magnus,

Cool circuit! It looks very promising!
One note however - to make those mosfets operate linearly 
you have to reduce the voltage swings at the "input" 
(i.e. the outputs of the inverters in U2). 
As drawn here the internal D-S diodes will be activated. 
Since you tied Vss and Vdd together the permissible voltage 
over the resistors is perhaps +/-0.6V. 

Cheers,
 René



At 06:23 30.09.01 +0200, Magnus Danielson wrote:
>Dear all,
>
>Biten by the 4069 bug I came up with a general idea for an 4069UB only
>based envelope generator. As it happend, it just happend to have CV
>input for the ADSR parameters.
>
>The current version, v0.1, is just a first attempt to draw something
>up. It is doomed to not work and is not tested. I provide it only as a
>basis for some discussion and let some people get the oppertunity to
>voice oppinions.
>
>The architecture is as follows,
>
>U1 is a normal logic 4069UB that runs on single +9V supply.
>It forms the main processing of the Gate signal and act as the state
>machine.
>
>U2 is a 4069UB operating as variable resistors. It has now power
>supply.
>
>U3 is a 4069UB operating as a linear amplifier. It runs on +/- 9V so
>that bias sets at about 0V. The integrator cap and linear inverter is
>built from this.
>
>D1 and D2 froms part of the envelope sequence logic.
>
>As the curcuit is built right now there is a fundamental flaw, but I
>let your brains work out what it is ;O)
>
>Take it as an inspirational thing! ;O)
>
>Cheers,
>Magnus
>
>
-- 
uzs159 at uni-bonn.de
http://www.uni-bonn.de/~uzs159