AW: [sdiy] discrete SSM2018?

[Czech Martin]

Well, the current transfer ratio of a mirror depends basically
on current gain. That would mean base width and doping profile,
not so much collector properties.
The two transistors involved are of the same type and should be
locally matched. We can only hope that another pair of transistors
have a similar ratio if the are 100um away. This hope is certainly
better then for a discrete pair.

PNP nd NPN behaviour should have no correlation, since
extra steps are involved for PNP. This is not so important
as long as the mirror as such has repeatable gain.

I think the situation for mirrors is releaxed, since we talk
about 98% transfer ration e.g.
The input offset voltage is another thing, since an exponential
Ube/Ic law is involved. Depending on the layout a couple
of mV should be observed. If it is in a feedback loop,
this could appear as output offset. I think the SSM2218
has about 10mV output offset shift @ room temp when goin
from 0dB to -96dB. If you consider that 10V peak signals
are allowed, this is ok, even for most pitch control voltage
applications.

It is not clear top me if this target can be met using the proposed 
techniques in a discrete or semi discrete design.
I guess we'll have to try.

m.c.


> -----Ursprüngliche Nachricht-----
> Von: jhaible at t-online.de [mailto:jhaible at t-online.de]
> Gesendet: Dienstag, 6. November 2001 14:59
> An: Czech Martin
> Cc: Sdiy (E-Mail)
> Betreff: Re: [sdiy] discrete SSM2018?
> 
> 
> 
> >1:0 for Haible. There is really no reason why this should work.
> >Except for temperature dependence, but also this is not valid.
> 
> 1:0 ? Hardly. Actually, I have no idea what's going on in a
> chip design when a tight matching is attempted.
> So, another question, quite contrary to the first one:
> The overall gm of an OTA also depends on the current transfer
> ratio of the current mirrors. This is also related to an "offset"
> voltage between two transistors of the mirror. Now how do
> they manage to match *this* from amplifier to amplifier?
> Or how do they manage to match the npn and pnp mirrors
> in one OTA, to start with ? I mean, how can they do *this*,
> while they cannot spec the gm of one OTA tightly ?
> (Assuming the gm of the input pair is not the problem,
> as it follows a fundamental rule, depending on Iabc.)
> This looks like matching across the chip would be easier than
> matching two parts of one mirror, which is hardto believe.
> Any ideas ?
> 
> JH.
> 
> 
> 
> 
>