AW: [sdiy] frequency doubling

[Czech Martin]

IMHO opinion the square approach is only usefull for
a fixed frequency application, or if harmonic content
is of no importance. Been there , done this many times
for video on chip appl.

E.g. if you have some pulse wave (assuming reasonable
low noise) you can differentiate that, thus obtaining two pulses per cycle.
The pulse may need some conditioning (min. pulse with, e.g. via mono) then
this could be fed into a divide by two FF, thus
realizing a divide by one, which is usefull now and then. The pulse
differentiator is a delay chain and some xor/and/or gate to combine delayed
and non delayed pulse. This will create a peak on every signal change. Of
course this will be susceptible to noise. also.

So, in some digital application this may be usefull.

But I suspect you think about vco frequency doubling, i.e. wide range.
Obviously the above method won't work. You could use a pll if the frequency
modulation is way slower then your center frequency, which is also not the
case for wide range audio, thus the pll filter will add too much lag, or
portamento.

I think a much better method is to use a sawtooth wave vco and two or more
comparators, just as needed. Now you can tell when the saw has reached so
and so many % of the peak value (which is fairly constant for a vco, if you
use Moog/Hemsat (sp?) compensation and a fast internal Schmidt, instead a
slow Schmidt and the usual resistor voltage drop compensation).
It is easy to convert this level information into a staircase pattern or
into a pulse train, just as you like. 

Possible sources of error:
-comparator offset voltage (10V amplitude and integrated comparators will
allmost eliminate this)
-comparator lag (well, 100us cycle time means, that the comparator should be
faster then 1us or so, I think that is reasonable)
-glitches when combining the comparator outputs and during saw discharge
(this will need additional logic/monos to cure, perhaps a triangle wave
might be better in this last respect)

Anyway, using such an "ADC" scheme one should be succesfull in obtaining a
frequency that is higher by some integer value. Of course, you'll get never
rid of some fundamental partial "leakage" since the single steps are more or
less nonideal. This may be not harmfull in harmonics synthesis where some
fundamental is always present but maybe some other applications might not
tolerate this.

btw.: always take a look into the maximum differential input voltage spec of
your comparator chip (differential mode spec). Some devices don't like such
high input voltages. This is even more important if you abuse a standard op
amp for such purpose.

m.c.


-----Ursprüngliche Nachricht-----
Von: Mountain Man [mailto:mtman at cloud9.net]
Gesendet: Freitag, 25. Mai 2001 12:49
An: synth-diy
Betreff: [sdiy] frequency doubling


Hi folks,

Thanks very much for all the input on my Xpander powersupply; I'll be
doing some testing over the weekend based on these comments :)

On a different topic, I'm interested in building a frequency doubling
circuit.  There was some talk here a while back which I haven't been
able to find in the archives.  The gist, as I recall, was to create a
50% duty cycle square with the same frequency as the original circuit,
then use leading and falling edges to create trigger pulses.  I
understand most of this, but there are two parts of the process I'm
unclear on.  First, how would I create a 50% square wave from a
non-symetric input (if its symmetric about a known voltage, I know to
simply use a comparator).  In particular, I have a square wave that's
not 50% - what do I need to do to it.  The other part is how to convert
narrow trigger pulses (after doubling) back into something like a square
wave or triangle.  I know how to get fixed-width pulses (using a 555 for
example), but that won't work well over a range of frequencies.
Suggestions?

Thanks as always,
Elby