[sdiy] Re: Are we Live?

[Stefano Costa]

Jim Patchell wrote:

>     I have been doing a little work on putting a digital synth into an
> Altera ACEX EP1K30.  I am pretty amazed, what I had in mind for a
> minimal system seems to fit just fine.  Here are the specs:

Well, pretty cool! I have some questions about.

>     Interface: 68000 processor bus, 16 bits.
>     Look up table: Up to 16 meg per bank (a bank contains all of the
> waveform for one cycle) with TBD number of banks.  Memory is 16 bits
> wide.
>     Oscilators:256, 24 bits, 96KHz sample rate.
>     Envelope Generators:256, 16 bits.  There are to register backs, an
> increment register, which controls how much the envelope changes value
> per sample period, and a ramp to value, which will generate an interrupt
> when it is crossed.  The micoprocessor is responsible for changing these
> values to create the composite envelope.

I assume that the controlling CPU, the 68000, writes registers contained in
Altera, and that chip is responsible to iterate the wavebank reading of the
sample in external RAM. If you write control registers of the chip while a
sample is played, do a 'glitch' in played occurs or you have programmed the
thing so nicely that you can edit things on the fly and listening the
results gracefully? I ask this because this kind of hardware logic is
tricky...

>     Algorithm Table:256 words by TBD bits.  This memory determines how
> everything is processed.  What gets added to what, who gets modulated by
> who.
>     Outputs: A stereo digital stream that can be interfaced to your
> regular 24 bit CD DACs.

I am pretty ignorant on the interface of those chips: what do they have? A
24 bit bus, a 16 one, use the same clock of sample (96KHz...).
Anyway you are pretty skilled in digital electronics :).

Stefano