[sdiy] CMOS schmitt trigger question

[harry]

media at mail1.nai.net wrote:

<snip>

> The Harris CMOS Logic Selection Guide 1994, for the CD4000B series it says:
>
> "ALL CMOS inputs should be terminated. An exception can be made in the case
> of unbuffered NOR and NAND gates where terminating one of the series inputs
> to the proper polarity will not permit current flow caused by a floating
> input.  Thus tying low one of the the inputs of an unbuffered NAND gate, or
> tying high one of the inputs of an unbuffered NOR gate will satisfy this
> requirement."
>
> So besides the previous exception, all the inputs should be tied.  If the
> gate is unused, does it matter whether I tie them to Vdd or ground??
> Should they ever be tied to Vss??

In the case of the unbuffered gates (CMOS -A series) you can get different
results by either paralleling gate inputs (more input load... but better output

drive - meaning it will drive closer to the rails, just as increasing
transistor base
drive improves collector current).  This is not the case in the -B series
parts...

Usually you can tie inputs to whatever is convenient. I usually tie them to
some
rail... or to another nearby (non-critical) signal. I always avoid "burying"
the gates
in such a way (like power supply run through an input pin... or traces under a
socket
on the component side of the board...) that they cannot be easily liberated if
I need
the gate later...

> >Gene Zumchak used the convention "sucked" and "blown" in his
> >OTA Tutorial (at Rene Schmitz's web site)  I like this because there
> >is no confusion.  The industry I work in has a lot of trouble with this
> >>point... no one is sure what they are talking about.  I have not got them
> >>to agree to "sucked and blown" as a definitve terminology.  ;^)
>
> Oh my!!  What industry is that?? ;)

Well... obviously its not the ENTERTAINMENT industry...

H^) harry

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