AW: [sdiy] Having a hard time finding the chips you want - roll y our own!

[Czech Martin]

Their protofolio sounds good.
I couldn't find anything about costs.

How much will a mask set cost? (maybe 2 or 3 redesigns will be needed)
How much will wafers cost if you only need 1 or 2?
How to do wafer test? Cost?
Assembly cost?
Final test cost?

m.c.


> -----Ursprüngliche Nachricht-----
> Von: Darren Reid [mailto:shokwave at nbnet.nb.ca]
> Gesendet: Mittwoch, 29. August 2001 19:07
> An: DIY Synth List
> Betreff: Re: [sdiy] Having a hard time finding the chips you 
> want - roll
> your own!
> 
> 
> "Alex" <alex at xatomic.ch> sez:
> 
> >But here come's what you might be looking for:
> >They also offer a CAD software which's called "Target Chip Designer"
> >With this program you can design your own ASICs (Analog and 
> Mixed Signal)
> >and then you can send the file directly to "Prema Semiconductors"
> >(http://www.prema.com)
> >which produce the chips for you.
> >
> >Sounds nice, but actually I wasn't able to find out minimum 
> amount of ICs
> >you have to order and
> >the costs.
> 
> This is exactly the sort of thing that many folks here would 
> be interested
> in. Wouldn't it be a hoot to design our own chips for SDIY? A 
> collaborative
> project would be a lot of fun.
> 
> One possible idea that might bring this into the realm of 
> "cost efficiency"
> might be something like what they did at Delft University:
> http://cas.et.tudelft.nl/software/ocean/
> 
> Here's some relevant info:
> 
> ----------------------------------------------------------------------
> Appendix A: Background of OCEAN
> OCEAN is the result of a joint effort of many people from the 
> Electrical
> Engineering Faculty at Delft University of Technology. It is 
> based to a
> large extent on the NELSIS IC design system and database. 
> This full-custom
> system was developed over the past 10 years at Delft 
> University, especially
> in the Network Theory group. To handle sea-of-gates design, 
> new tools were
> created and other tools were modified. Most of this work was 
> performed as a
> result of the IOP sea-of-gates project, which started 4 years 
> ago. The main
> drive to make the package more user-friendly was the advent of the new
> curriculum for EE students. The latter included a practical 
> design course in
> which the students design a complex circuit in a group, simulating a
> commercial environment. This course started september 1992 
> for the first
> time and has been quite successful.
> Why sea-of-gates??
> The OCEAN design system is targeted to produce sea-of-gates 
> layout. This
> means that they deal with a prefabricated transistor pattern 
> on the chip. To
> implement a circuit, the tools (or the designer, for that matter)
> interconnect these transistors with metal wires. Our 
> sea-of-gates layout
> strategy aims at four goals:
>  1. Minimization of the fabrication time. Because the chips are
>     prefabricated (the transistors are already on the master 
> image), the
>     silicon foundry only processes the masks related to metal wires.
> 
>  2. Minimization of the design time. The time involved in 
> designing a cell
>     layout is reduced dramatically (as compared to 
> full-custom) because the
>     transistors are preplaced on the image. Typically, it 
> takes only a few
>     minutes to layout a flipflop or a combinatorial gate, and 
> the designer
>     does not need to know anything about the process design rules.
> 
>  3. Minimization of the chip cost. The layout design starts with a
>     prefabricated master image. This is a semi-manufactured 
> article that
>     can be produced in large quantities. At Delft University 
> of Technology
>     we have 150 wafers for the 'fishbone' image in stock.
> 
>  4. Full-custom properties on Semi-Custom chips: Efficient 
> implementation
>     of structured logic (RAM, PLA etc.). In contrast to the 
> conventional
>     gate-array, a sea-of-gates does not have pre-defined 
> routing channels.
>     This enables a much more compact and clean implementation of
>     structured circuits such as processors.
> 
> The OCEAN suite of tools handles a wide variety of sea-of-gates master
> images and process technologies. The tools MADONNA (the 
> placer), TROUT (the
> router) and FISH (purifier and design rule checker) handle the various
> peculiarities of the images to produce optimal layout.
> 
> ___________________________________________________________
> 
> Would this be a good way to design analog audio circuits, for example
> filters?
> 
> -Darren
>