[sdiy] CCD321 Analog Shift Register
Thomas Laskowski
tlaskows at student.math.uwaterloo.ca
Wed Aug 22 18:04:28 CEST 2001
Hello,
For 1000 stages, wouldnt that only allow for 0.1 second of delay at 10khz
not 1 second?
If so, then it it way too expensive.
Thomas
On Wed, 22 Aug 2001, Atom 'Smasher' wrote:
> expensive.... i once picked up an MXR analog delay for less than that.
> (and a few DOD analog delays for ~WAY~ less)
>
> anyway, i'm not sure if my math is right....
>
> dual 455 stage = 910 stages (?)
> (we can round this to 1000 stages?)
>
> so, 1000 stages @ 10KHz clock = 1.0sec delay ???
> @ 20KHz clock = 0.5sec delay ???
> @ 40KHz clock = 0.25sec dealy ???
>
> what determines the max (usable) frequency?
>
> also, a quick search of http://www.fairchildsemi.com/ dosen't come up with
> anything for that part number.... that's not encouraging.
>
>
> ============================================================
> > Took a look through a 1985 Fairchild CCD Imaging databook and saw this:
> > the CCD321 - a dual 455-stage analog shift register in a 16-pin ceramic
> > package - one version is intended for audio use. Requires 3 clocks, and
> > sample rate is spec'd for 10 KHz to 20 MHz. This chip is still in
> > production, and may be obtained from www.fairchildimaging.com at 120
> > dollars US a pop. Anyone ever try one of these for audio?
>
>
> ...atom
>
> ----------------Void-If-Detached----------------
> http://smasher.suspicious.org/fs1r Yamaha FS1R
>
> "Freedom without opportunity is a devil's gift, and the
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>
>
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