[sdiy] CCD321 Analog Shift Register

[Scott Gravenhorst]

Since the spec says 20mhz tops, I doubt if that's an issue
since the delay would be so short as to be unusable for
audio.  The question is how well, if at all, it
would work below 10mhz.  Since each bucket is really
a capacitor, the low clocking end would be determined
by how quickly the capacitor's charge bleeds off due
to internal leakage.  For 10mhz-20mhz, the caps would
be very very small.  At low clock rates, the charge may
be all but completely gone by the time the clock tries
to shift one bucket to the next.  There may be other
reasons as well, but at the least, one can assume they
assigned the specs the way they did for good reason.
I read the same explanation for clock speed limitations
in a microprocessor spec that stated the MPU (MC6800)
had dynamic registers (needs refresh) and that the chip
would not be reliable below 500khz.

"Atom 'Smasher'" <atom at suspicious.org> wrote:
>expensive.... i once picked up an MXR analog delay for less than that.
>(and a few DOD analog delays for ~WAY~ less)
>
>anyway, i'm not sure if my math is right....
>
>dual 455 stage = 910 stages  (?)
>(we can round this to 1000 stages?)
>
>so, 1000 stages @ 10KHz clock = 1.0sec delay ???
>		@ 20KHz clock = 0.5sec delay ???
>		@ 40KHz clock = 0.25sec dealy ???
>
>what determines the max (usable) frequency?
>
>also, a quick search of http://www.fairchildsemi.com/ dosen't come up with
>anything for that part number.... that's not encouraging.
>
>
>============================================================
>> Took a look through a 1985 Fairchild CCD Imaging databook and saw this:
>> the CCD321 - a dual 455-stage analog shift register in a 16-pin ceramic
>> package - one version is intended for audio use. Requires 3 clocks, and
>> sample rate is spec'd for 10 KHz to 20 MHz. This chip is still in
>> production, and may be obtained from www.fairchildimaging.com at 120
>> dollars US a pop. Anyone ever try one of these for audio?
>
>
>	...atom
>
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