Junction Noise
Magnus Danielson
cfmd at swipnet.se
Wed Sep 6 23:15:43 CEST 2000
From: Brockr0 at cs.com
Subject: Re: Junction Noise
Date: Wed, 6 Sep 2000 15:28:44 EDT
> In a message dated 9/6/00 6:47:58 AM Pacific Daylight Time,
> czech at Micronas.Com writes:
>
> >
> > :::I have a 24 bit unit clocked from a VCO that has no automatic
> > :::"forbidden" state fixer. I have a reset switch that I have used only
> > :::once when troubleshooting it. The math says that if the unit
> > :::is well constructed, there should be no possibility of locking up.
> > :::I've used mine for hours and hours and never had a problem.
> >
> > sure. For audio purposes there may be no need for a false mode
> > detector. If the noise stops, give it a reset. OTOH for serious
> > applications such a detector is a must. Any circuit I design here will
> > NOT pass any design review if I can't prove how the system will get out
> > of such a trap, with good reason. We had several cases of grief were
> > such locking up causes "crash" of a chip.
> >
> > You can not say by math that the false state will never be, instead you
> > can predict the propability.
>
> Sorry Martin I have to disagree with you. A linear feedback shift register is
> a math function as Magnus pointed out previously. The tap points produce
> a polynomial equation of the form G(x)= 2^N + 2^(N-a) + 2^(N-b) + ... + 1
> where N is the number of stages in the shift register. The function
> performed by clocking the shift register is division. The pseudo-random
> noise generator is a special case in which the function performs a
> convolution where any number of N bits input will produce a unique output
> of N bits. Continuously clocking the shift register produces a bit stream
> that repeats every 2^(N+1) clocks.
> By design, there can be no "false mode".
Incorrect, the number of states possible in the state machines that you have
built is 1 and 2^N - 1. The polynomial will ensure the maximum length sequence
for one of the state-machines, but there is a second (or first) state machine
having a single state and the linear feedback (yes! This is linear feedback
in the Galois Field GF(2).) will not see anything else. Using XOR gates only
you may not have all zeros, since then there is no chance you could get a 1.
This is the stable state of the other state machine. You need non-linear
hardware (a NOR on all outputs and the OR that result in on any input) in order
to ensure that you get an transitions from that state into basically any state
in the other state machine, then that will loop linearly over the states it
has.
> > Avoiding the false state was not the main idea of feeding
> > analog noise into the shift register. The idea was to
> > improove statistical or spectral behaviour by "scrambling",
> > as well as artificial sound effects, and having FIR
> > filtering as well...
> >
> > This may be interesting for very low frequencys where analog
> > filters are difficult to realize...
>
> This one is more interesting.
> Firstly, the whole reason for implementing a long tapped shift register is
> to more accurately simulate analog noise, so if you already have an
> analog noise source why waste hardware on pseudo-random noise
> source? Except of course that they do sound different and you can
> never have too much hardware.
>
> The spectral behavior of a pseudo-random noise source is dominated
> by the clock rate. Messing with bits in the shift register is not going to
> change it much. But...
Well, when you get longer shift registers, the noise spectrum gets denser
given the same clock frequency. I have explained this in detail some time back
with a bunch of formulas.
Cheers,
Magnus
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