Junction Noise

[Tim Ressel]

Well, you math weenies have one on me. I can tell you that I have studied PRN
sources with FFT analysers, and the output falls into well defined buckets. In
between the buckets there are definite holes: frequencies with no energy. My
idea was to frequency modulate the clock with another unrelated PRN. This would
smear out the energy and fill in the holes. This I believe would make for better
"noise".

Does it ever bug anyone that we are discussing the vageries of *noise* quality?


Tim Ressel--Compliance Engineer
Hewlett-Packard
Verifone Division
3755 Atherton Rd.
Rocklin, Cal
916-630-2541  
timothy_ressel at hp.com



-----Original Message-----
From: Brockr0 at cs.com [mailto:Brockr0 at cs.com]
Sent: Wednesday, September 06, 2000 12:29 PM
To: synth-diy at node12b53.a2000.nl
Subject: Re: Junction Noise


In a message dated 9/6/00 6:47:58 AM Pacific Daylight Time, 
czech at Micronas.Com writes:

> 
>  :::I have a 24 bit unit clocked from a VCO that has no automatic
>  :::"forbidden" state fixer.  I have a reset switch that I have used only
>  :::once when troubleshooting it.  The math says that if the unit
>  :::is well constructed, there should be no possibility of locking up.
>  :::I've used mine for hours and hours and never had a problem.
>  
>  sure. For audio purposes there may be no need for a false mode
>  detector. If the noise stops, give it  a reset. OTOH for serious
>  applications such a detector is a must. Any circuit I design here will
>  NOT pass any design review if I can't prove how the system will get out
>  of such a trap, with good reason. We had several cases of grief were
>  such locking up causes "crash" of a chip.
>  
>  You can not say by math that the false state will never be, instead you
>  can predict the propability.

Sorry Martin I have to disagree with you. A linear feedback shift register is 
a math function as Magnus pointed out previously. The tap points produce 
a polynomial equation of the form G(x)= 2^N + 2^(N-a) + 2^(N-b) + ... + 1 
where N is the number of stages in the shift register. The function 
performed by clocking the shift register is division. The pseudo-random 
noise generator is a special case in which the function performs a 
convolution where any number of N bits input will produce a unique output 
of N bits. Continuously clocking the shift register produces a bit stream 
that repeats every  2^(N+1) clocks. 
By design, there can be no "false mode".


>  Avoiding the false state was not the main idea of feeding
>  analog noise into the shift register. The idea was to
>  improove statistical or spectral behaviour by "scrambling",
>  as well as artificial sound effects, and having FIR
>  filtering as well...
>  
>  This may be interesting for very low frequencys where analog
>  filters are difficult to realize...

This one is more interesting. 
Firstly, the whole reason for implementing a long tapped shift register is 
to more accurately simulate analog noise, so if you already have an 
analog noise source why waste hardware on pseudo-random noise 
source? Except of course that they do sound different and you can 
never have too much hardware.

The spectral behavior of a pseudo-random noise source is dominated 
by the clock rate. Messing with bits in the shift register is not going to 
change it much. But...

A properly implemented linear feedback shift register output is, 
statistically, as random as it can be. If you arbitrarily change bits 
you reduce the length of the bit stream loop, at least temporarily. 
Does this make it more or less random? Any chaos theory guys out 
there?

Brock Russell