Psuedo Noise Generator Schematic

[Magnus Danielson]

From: Jim Patchell <patchell at silcom.com>
Subject: Psuedo Noise Generator Schematic
Date: Wed, 06 Sep 2000 12:17:36 -0700

Jim,

>     As promised, I have done a quickie design that will go into a XC9536
> cpld.  The features are selectable lenth of 9,18,27 or 36 bits.  This
> has not been tested (or simulated for that matter), so......your milage
> may differ.  If you spot any obvious problems, it would be nice if you
> told me.  Here is the schematic:
> 
> 
> http://www.silcom.com/~patchell/noise/noise.pdf

OK. I reverse engineer out these polynoms:

 9    5
x  + x  + 1

 18    6
x   + x  + 1

 27    5    2    1
x   + x  + x  + x  + 1

 36    24
x   + x   + 1

Now, for the polynomial form

 n    m
x  + x  + 1

the polynomial

 n    n-m
x  + x    + 1

is also correct.

So, in one book I have n = 9 and m = 5 and in another I have n = 9 and m = 4,
but these are equalent. m may also be 1 and 8.

However, for n = 18 I have m = 7 in one book and m = 11 in the other, but these
are equalent according to the rule. Your schematic does not match either of
these. Actually, in other sources I have that m may be 3, 7, 9, 11 and 15.

For n = 27 there is no valid polynom with only one tap, so we have to rely on
multiple taps, and there you have a valid one.

For n = 36 I have m as 9, 11, 15, 21, 25 and 27 but 24 is not allowed.

So, as far as I have researched you have 2 out of 4. Move two taps and you
should have a full house!

Oh, if anyone wondered, there is no m for which you get a valid polynom when
you have n to be 1024, that is a 1024 D flip-flops long shift register...
I guess all you guys where sitting there and pondering about that, wheren't
you? ;O)

Cheers,
Magnus