A viable solution[Was]Re: MM5837?
Magnus Danielson
cfmd at swipnet.se
Sun Sep 3 23:48:28 CEST 2000
From: Harry Bissell <harrybissell at prodigy.net>
Subject: Re: A viable solution[Was]Re: MM5837?
Date: Sun, 03 Sep 2000 17:20:33 -0400
> Remember you need a mechanism to unlatch the generator from an all 1's
> (or 0's depends on logic) state, should this occur. Eventually (i think) the
> register will reach this state. The schematic I've posted in the past has an
> RC network to kick in a pulse if the time-out is reached. I have NEVER heard
> this audibly...
Given a 1 in the shift register you will allways get at least a 1 in the shift
register. If you have an MLS sequency polynom you have a two statemachines, one
with 1 state and one with 2^n-1 states. Those two state machines will take up
all 2^n possible states in the shift register. The only thing you have to
worry about is ensuring you end up in the right state-machine, so forcing a 1
into the statemachine as a reset will be enough. You could also do some logic
which will look at all the outputs and if they all are zero, then or in a
1 into the first shift register. There is room for such logic in the XC9536
since the PAL fields is virtually unused anyway.
So, a true MLS sequence will allways loop automatically. If your doesn't loop,
there is something fundamentally wrong.
There are simple tests to ensure that a polynom will loop.
Cheers,
Magnus
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