2nd generation VCFs (was: Xpander VCF)

[Magnus Danielson]

From: Haible Juergen <Juergen.Haible at nbgm.siemens.de>
Subject: 2nd generation VCFs (was: Xpander VCF)
Date: Wed, 25 Oct 2000 15:29:24 +0200

> Hi Marjan and list,

Hi Juergen and list,

> I have not seen the filter in question (Can you give me the address
> ?), but there is something more general that I have discovered and
> reverse engineered just lately.
> 
> You know, there are several "2nd generation" VCF chips that don't use buffer
> stages between their OTA stages.
> 
> If you look at 1st generation VCF chips like SSM2040 or CEM3320, you
> have the gm cells that need a small input voltage, so there is a resistor
> divider from the previous stage, and a resistor divider in the feedback loop
> from the same stage's output as well.
> 
> At one point the circuit designers must have seen that this is really
> unnecessary, boosting up - dividing down - boosting up - dividing down.
> You can just omit the resistor dividers and run the capacitor and buffer
> stage at the same 20mV as the OTA inputs. You need very low noise buffers
> of course. And because of the altered internal loop gain, you need much
> larger cap values for the same cutoff frequency.
> 
> Next step: Why use these stupid buffer stages at all ?!  Sure, the input of
> the following OTA has a painfully low impedance, but then this impedance is
> changing with the control current just like the cutoff frequency. So instead
> of isolating that impedance with a FET or darlington buffer, just connect it
> in parallel to the capacitor. And while you're at it, just connect the
> negative input of the stage's own OTA parallel to the cap as well.
> 
> If you draw the schematics for that, it's ridiculously simple. Like that:
> 3080#1_pin3 = input. Connect together 3080#1_pin6, capacitor, 3080#1_pin2
> and 3080#2_pin3. Hard wire it all together, and build a chain of 3080's
> and capacitors with *no* resistors or buffer transistors whatsoever.
> 
> Does it work ? In simulation it does, in certain SSM and CEM and Roland
> chips apparently it does as well. (If my interpretation of the data sheets
> is right).
> 
> Surprised ? I was surprised for sure !

Right. I would strongly advice you to read the patent behind the SSM
2044. It is US Pat. 4,404,529. That patent expired in 1995 BTW, so
it's content is out for grabs!

For being a patent I think the technical description is rather
good. Some polishing and you have the basis for a good paper. The gm
cell is a three-transistor current mirror which is fully derived in
the paper. Other parts of the SSM 2044 topology is also described so
it basically acts as a guide on how to develop a full 4-pole filter!

Juergen or someone else should find it easy to conver a lump of BC550
and BC560 (or 2N3904 and 2N3906 for our american listeners) into a
full-fledged filter.

> All right, for the last of 4 stages you probably want a buffer stage,
> because you're driving the feedback loop, and a VCA and whatever.
> But there would still be no reason for a different cap value and for
> resistor dividers, no ? One could just insert a FET (and source
> resistor), and then drive the OTAs for VCA and VC feedback with 20mV as well.
> 
> BUT ! (And that's a rare occasion when you'll find me using capital letters)
> BUT if you do this for the last stage as well, you get some feedthru from
> the input *backwards* thru the feedback OTA to the output.
> The result is that your filter will not sound as smooth and "dark" as it
> should.
> The rolloff has the 24dB / oct at first, but after a while it becomes flat
> and you get your high frequencies thru with a fixed attenuation of a
> few dozen dBs. That's why I think the chip designers used a
> different scheme for the last stage. There is even a chip intended
> for 2pole and 4pole use which has alternately unbuffered and
> buffered OTA stages. (Might be in the JP-6, but I'm not sure.)
> 
> I may be completely wrong with my interpretation of course, but then at
> least
> the explanation fits nicely in retrospect. I'd love to see this confirmed or
> denied from SSM and CEM designers - let's see if there will be some
> reaction.
> Or is there even some publication about it ?

Go and read the patent. I think you will find the issues quite clearly
described in there. It is now a few months since I read it, but I
could pick it up again and we could make a walk-through.

> At last, a "caveat": If you're going to try this with 3080's, make sure that
> offset voltages won't get you in trouble.
> 
> Some food for thought: What does this (possibly) tell us about Moog filters,
> and different buffer and feedback stages ??

When I saw the SSM 2044 patent, I just went "Oh, a shaken Moog ladder" ;)

Cheers,
Magnus