BBD-MN3010 and MN3011- is a MN3101 clock necessary?

[René Schmitz]

At 13:06 05.05.00 +0200, Haible Juergen wrote:

>4 NAND gates form a HF VCO.
>One half of a JK-FF to create the symmetrical clock.
>Other rhalf of JK-FF connected as monoflop to create the gap.
>(and a trimpot to adjust the exact gap time - fits in your theory !)

Right, this is very interesting. Probably there is an optimum value of the
gap, where the cancellation of the spikes is maximum.

>2 NAND gates to mask the symmetrical clock during the gap time.
>(as suggested in TDA1022 data sheet)
>Two high current drivers (complementary emitter follower, "class C
>amplifier", 10 Ohm current limiting resistors at collectors.

I think one should include the drivers into the feedback of the FF, then
you insure that propagation times don't spoil your efforts. (Of course if
you mask the overlap out anyway, you can do compensate for that...) 
Thats why I favour the symmetrical astable oscillator followed by "gate
discrete" RS-FF. I think the overlap will get smaller the more drive your
outputs have. Brute force method, but why not. In this respect the 4013
(and the like) are inferior. AFAIK the CMOS-FF have less fanout than the
CMOS gates. (I'm not sure, anyone ?!)

>More interesting circuit details: NE570 companders with quite some
>external components to improove the 570's performance.
>Discrete 6-pole filters at BBD input and output.

Properly designed filters are a must, and a compander is certainly still a
good idea.

Bye,
 René



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