DAC716, two wire operation

Theo Hogers t.hogers at home.nl
Sat Mar 11 00:23:20 CET 2000

mmm . . I can be mistaken, but it looks like a 3 wire SPI interfase to me.
The only snatch seems to be the A0 and A1 lines, see figure 1 on page 7 of
the data sheet.
When A0 is low serial data is loaded in the input latch.
When A1 is low the bit pattern in the input latch is loaded parralel in the
DA latch.
Thus when you load data while both are low you end up with fantastic low-fi

Best way to connect this seems to me over SPI and use the ISP ready interupt
to activate A1.
Take a peek in the AVR documentation.
 A0 is SS\, SDI is MOSI and SDO is MISO, so far i understand it the clock
polarity bit (CPOL)
must be set to 1 to get the correct clock signal.
The only problem is that you need a clock pulse to get the 716 respond to
the low level on A1.
Chancing the CPOL bit to zero and back should do the trick.

Note that i didn't test this, just reading the documentation.
(:-) pure self intrest by the way, your not gona use it to do CV control 'n
stuf are u. (well I am.)

Cheers Theo

----- Original Message -----
From: Roel Das <Roel.Das at student.groept.be>
To: Synth DIY <synth-diy at node12b53.a2000.nl>
Sent: Friday, March 10, 2000 4:18 PM
Subject: DAC716, two wire operation

> Hello again,
> I've been looking at the datasheets of BurrBrowns DAC716. This device
> a two wire operation. When using this mode, is the d/a latch always one
> behind the input shift register, or is it as if the latch disabled when
> Ao and A1 are connected to ground? It says in the datasheet (p3, the truth
> table) that using two wire operation, all digital input changes will
> at the output, but it doesn't say anything about the timing. If you clock
> 16bit, do you need another clock pulse to get the correct output, or is
> output directly available after you clock in the 16th bit?
> Anyone knows this?
> Datasheets etc can be found at:
> Folder?productName=DAC716
> Thanks!!
> Roel

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