Formant ADSR

Theo Hogers t.hogers at home.nl
Fri Mar 3 17:38:15 CET 2000


Dear Carlos,
please note: In the release stage the voltage of a formant ASDR drops to
0.5V and not to zero,
this is caused by D1 and normal .
The sustain pot should have no effect on the out put level in when in
release mode.
First check the polarity of D1.

Is this ok, than the problem is probably in the attack stage, since this is
the only stage that sources C2.
Test if moving P2 (attack) affects the output level.

Set S1 in position B (adsr mode) and check the output of IC1 (pin6).
It should be 0V when no gate signal is pressent and 6V if it is.
If not check the the connections of T1 and T2, an other possibility is that
IC1 is broken.

If this is not the problem check T3 and T4.

Hope this will be of anny help,
greethings Theo.



----- Original Message -----
From: Carlos Vila Deutschbein <si04697 at salleURL.edu>
To: Sinth-diy <synth-diy at mailhost.bpa.nl>
Sent: Thursday, February 24, 2000 10:04 PM
Subject: Formant ADSR


> oops, sorry. again:
>
> I just finished building the ADSR module from the Formant Synthesizer (Got
a
> copy of the elector magazine, first edition).
>
> The case is that everything works fine except the Release stage.
> Once the Gate input has dropped, the Envelope output does not drop to 0 V
as
> it should. Instead, it just drops to about 1.5 V.
> I have checked that the voltage at the release pot is 0 V.
> I think that the problem is at the Sustain path, because: if I turn the
> on-board variable resistor, the before mentioned voltage of 1,5 V can be
> slightly modified about 0,3 V up and down.
> Any clue or known problems?? Should I post the circuit?
>
> Thanks!
> --
> ==================================================
> Carlos Vila Deutschbein       si04697 at salleURL.edu
> Enginyeria La Salle     www.salleURL.edu/~si04697/
> -------------- Barcelona, Spain ------------------
>




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