POT jitter on ADC???

[Batz Goodfortune]

Y-ellow Y'all.
	Ok I've finally coded it. It's an average of 8. I could make it an average
of 10 but after that I need to do another nibble's worth and I'm plumb out
of space. Even after removing the last *less-than-critical* routine.

I can still make the pot jitter but it doesn't seem to jitter on boot up
any more. Not that it did it all the time but at some pot positions it was
prone. It does seem to be a lot smoother now. I'm hoping that 8 is enough.

I would have liked to have had room to put some LED flashing code so that
it would tell you if the patch was about to be changed but not to worry.

Thanks to everyone who made suggestions. I never would have thought of
doing this. After looking at everyone's suggestions it turned out to be
easier that I had imagined but it did use all my remaining code space.

Just in case you wish to pick the bones of my code I've pasted it below.
Further proof that as a bit bolter, I make a good brick layer.

Thanks once again. Most appreciated.

Be absolutely Icebox.

;****************************************************************************
;*  READ KNOB SUBROUTINE                                                    *
;*                                                                          *
;*  Reads the pot and does an average of 8 then presents the findings in A  *
;*  Calls the original read08831  primitive		                    *
;*                                                                          *
;****************************************************************************
READKNOB:
		push	psw			;save context
		clr	rs1			;Change to reg bank 1
		setb	rs0
		
		clr	a
		clr	c
		mov	b,a
		mov	r2,A
		mov	r3,a
		mov	r7,#8			;R7 keeps count
averageloop1:		
		ACALL	read08831
		add	a,R3
		mov	R3,a
		jnc	avernotinc		; if there's no carry then don't inc B
		inc	b
avernotinc
		DJNZ	R7,averageloop1
		;Mov	R2,B
		;we now have a 12 bit number and can divide it.

		SWAP	A			;shift nibble right (it's already stored in R3)
		anl	a,#00001111b		;remove the MS nibble.
		xch	a,b			;get the MS nibble from B
		swap	a			;shift nibble left 
		orl	A,b			;bang 'em together
		
		mov	b,#8			;load B with the divisor
		DIV	AB			;divide the bastards
		swap	a			;make the result the MS nibble
		anl	a,#11110000b		;make sure there's no residual
		xch	A,R3			;store it in R3 for later and get the original word
		anl	a,#00001111b		;only want the LS Nibble
		xch	a,b			;xchange it with b
		swap	A			;make B the MS nibble
		ORL	a,b			;bang 'em together
		mov	b,#8			;b contains the divisor
		DIV	AB
		ORL	a,R3			;re-asemble the number
		pop	psw

		rr	a
		ANL	A,#01111111b

		ret
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
;+++  READ ADC08831 A to D converter PRIMITIVE
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
read08831
		;read the ADC08831 A-D converter
		clr	p1.6		;clear the clock pin
		setb	p1.6		;raise it again to form clock zero
		clr	P1.6		;hold it low ready for CS low.
		clr	P1.0		;lower /CS line
		setb	P1.6		;bring clock high again ready
		clr	P1.6		;leading edge of clock going low
		MOV	C,P3.7		;now check to see if data has been pulled low
					;out of tri state.
		JC	AtoD_exit	;if it's not zero then there is an error

		setb	P1.6		;Send clock high ready for falling edge
		mov	R2,#8		;prime the bit counter
                             
bit_clk08831:   
		clr	P1.6		;falling edge of clock clocks bit.
		mov	C,p3.7		;get bit
		RLC	A		;rotate carry right into Bit 7
		setb	P1.6		;raise clock
		DJNZ	R2,bit_clk08831
		clr	P1.6
		setb	P1.6
		clr	p1.6
		setb	P1.0
		setb	P1.6
AtoD_exit:		
		ret
;+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 _ __        _                              
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