Chip ID

[Martin Czech]

:::Now I wonder why it is so increadibly hard to build JFET input opamps that
:::have a decent overdrive behaviour. There are only a few that have no
:::phase reversal - I wonder if these all work with oscillation instead, or
:::if there are really "tame" ones ?

I guess because of parasitics. ;->

Matching implies differential input stage
as close and compact as possible, whereas avoiding parasitic artefacts
means isolating them, far away and so on. Of course all input stages
are matched.  If the differential mode or common mode max. input voltage
is exceeded the gate of the jfet can be either forward biased or reverse
biased breakdown, and this will inject either minority carriers into
the substrate or imply ordinary majority carrier currents.

It is not so easy to keep them on the path...

Where these currents go (diffusion or field forced) and what bipolar
structure they get into depends on topology and maybe also temperature and
operating point.  The jfet gate acts as emitter, and other junctions may
act as parasitic collector, depending on bias.  So this may vary from op
amp to op amp design, and even worse from manufacturer to manufacturer,
because if you by a 741 (this has a bipolar input stage, I know) it is
only guaranteed that the part will meet the spec sheet, this is what
the test engineer implemented. A certain topology or parasitics are not
guaranteed, later mask revisions could show other behaviour.

Are there any observations that strange things happen if the maximum
ratings or recommended conditions are NOT exceeded? This would be
interesting...  and hard to believe.


I have the feeling that these strange things happen, because you  
do not operate the devices under the recommended conditions.
Anything can happen then. You must not rely on any odd "feature".


m.c.