more VCO cores

[jhaible]

Very good points. Sounds very reasonable.
Reading this, it's a wonder the OTA triangle VCO is
tracking fairly at all. Maybe at a certain input level
the effects you describe just compensate.
Very interesting !

JH.

----- Original Message -----
From: Martin Czech <martin.czech at intermetall.de>
To: <ijfritz at earthlink.net>
Cc: <synth-diy at mailhost.bpa.nl>; <Juergen.Haible at nbgm.siemens.de>
Sent: Thursday, February 17, 2000 9:10 AM
Subject: Re: more VCO cores


> :::I'm sorry to say the answer is no, I just hacked at the circuit until I
got
> :::it to track right. (So much for "celebrity"!) I don't even remember how
I
> :::got the idea of varying the OTA drive level. I just wrote the effect
off as
> :::some non-ideal behavior that I would never understand (especially since
I
> :::could barely understand the ideal behavior).
>
> Sorry for popping in!
> My understanding is that three things can possibly happen:
>
> 1.
> If the diff stage is hard overdriven, the overdriven npn can get
> into saturation (I hate this saturation confusion with field effect
> and bipolar junction transistors, I mean Ube~>Uce here).
> This would mean charge storage in the base and considerable slow
> down of input response. Could happen and would influence
> the high frequency response (flatten).
>
> Many bipolar diff stages use Darlingtons and I think this saturation/
> charge storage slowness get's worse then.
>
> 2.
> The diff stage sits on top of the Iabc current mirror, it is stearing
> the Iabc current (or some mirrored fraction) into the inverting and
noninverting
> output stage mirrors. In "linear" operation the base current is quite
small,
> but it will already add to Iabc at the diff stage tail. I think if the
transistor
> saturates (or comes closer to that), beta goes down, i.e. the base current
> s becomes considerable, therefore the error is considerable.
> This would mean problems @ low Iabc currents.
>
> 3.
> And of course
> both diff amp trannys are involved, I don't know if saturation will
imbalance
> the input stage, so symmetry of the triangle get's lost.
> This can happen in a weird way, depending of the actuall chip layout,
> I don't know which frequency range will be affected by that.
>
> :::On a related subject, at one point in time I discovered that all of the
expo
> :::converters I had built had small high frequency oscillations. (See EN
#98,
> :::p. 15.) Terry recently found a similar effect when he revisited his VCO
> :::design. This effect causes the tracking to go sharp at the high end
also. I
> :::strongly suggesting checking carefully for this problem anytime
tracking is
> :::a problem. My present solution is to use a BB OPA132 for the op-amp in
the
> :::converter. This amp is optimized for feedback-loop applications, and
greatly
> :::reduces the amout of external compensation needed to kill the HF
> :::oscillations.
>
> So THAT'S it!! I could never figure out, how sharpness at the high end
could
> happen. Must be some kind of rectifying of the oscillation (current
rectify),
> so average currents get higher if the part oscillates.
>
> I allways though that oscillation is critical with the feedback
transistor,
> so it is compensated with a cap across emitter/collector. This
> should then happen when the transimpedance of the tranny is high.
>
> Now it seems to me that oscillation comes when the transimpedance is low,
> it is the opamp output stage that is loaded...
>
> ???
>
> I guess I have EN #98 reading this evening ;->
>
> m.c.
>
>
>
>