S&H

[Paul Maddox]

Dear all,

  Im trying to get a sample and hold working, useing an OPAMP, CAP and FET..

signal comes in, goes to Source of FET, Drain of FET goes to Non inverting
terminal of opamp,
and inverting goes to output... all straight forward..

 Question, HOW do I gate the damn FET??
Im useing a 2n3819,
Im guessing to be OFF (open circuit) the Gate should be at 0v (or should it
be -VCC?) via resistor (1K in my case)
And to turn it on, it should go (breifly) to +VCC... am I right?

My S&H I just built doesnt seem to work, it stays permanently open :-(

Suggestions?
Schematics?
URLs?

 Its for my new module in my modular, I have a LAG processor (cap+opamp+var
resistor) S&H (above cursed thing)
and a noise gen which gives PINK, WHITE and BLUE (works like a dream)

Paul