slightly ot: DAT clock deviation

[Magnus Danielson]

From: Martin Czech <czech at Micronas.Com>
Subject: Re: slightly ot: DAT clock deviation
Date: Tue, 8 Aug 2000 08:32:42 +0200 (MET DST)

Hi Martin,

> The reason for my question was that I'm getting forward with my room
> responses.

Oh, good to hear!

> It would be nice to record these severall times and to compute
> an average, since this will supress any environmental or other noise. The
> problem is that the random noise source I want to use is not correlated
> with DAT clock, so each recording may have some fraction of a clock
> delay to each other. This will introduce smearing when avereraging.

Right.

> I don't want to open my portable dat and pull a clock wire out of it...
> This would be the best, because the noise source would then be locked
> to it.

Right. This would certainly help, since then the noise source would not slip
in relation to your samples, so the cross-correlation stuff would actually
work.

> Maybe I don't need to average at all.  Maybe I can upsample the recording
> to 10xFs, then bandlimit to 20kHz and then achieve little delays of 1/10
> of the original clock and see which one is the best. But your drift
> example shows clearly, that the drift in 100s could well be severall
> samples, initial delay could be eliminated, but not drift.

Certainly. But it would be good to know how large these deviations could be.
Hmm... maybe I will set up my test later.

> I have an optical out, though. Perhaps I could look at that signal and
> restore the clock via pll! Noninvasive.
> 
> SPDIF format must be that way, made for restoring a clock out of it,
> because no other clock is given.  Has someone tryed this before??

SPDIF is a very nice format for doing what you just requested. Actually, it
is not hard at all. The biphase mark is being used specifically so that you
may do clock recovery, it would not work otherwise. Now, I can't recall from
the top of my head exactly how one should do it for bi-phase mark, but I can
dig it up. You should be able to do this using a 74HC4046 for instance,
possibly some minor extra logic. Then you get the fs * 64 clock, then you
take a divider and divide down at your convenience.

Another way would be to use a SPDIF receiver, it will punch out the clock.
Check out what Crystal Semiconductors have.

Cheers,
Magnus