ODP: thru zero VCO questions

[Harry Bissell]

Boy this is a "brain booster"

Yes...but

There are two cases... if the modulating signal is of the correct polarity
then we are integrating back into range, so we do nothing...

Or if the modulating signal is wrong polarity, then we could look that the
previous state (the flip flop is the memory) and "reverse" it. A couple of
gates would work... (no extra comparator..)

Or would it ?????

P.S. Your idea is good, because there would always be the possibility that
the modulating signal (if strange enough...) could slip past BOTH SETS of
comparators and still latch...

:^) Harry

jhaible wrote:

> >Why not use a second set of comparators, outside the normal range, and
> >brute force the flip-flop via Set and Reset inputs, which dominate the
> >Data and Clock.
>
> This was my first thought as well (;->).
> Problem is that, unlike a normal VCO, you cannot know which
> input, preset or reset, is the right one in a certain case: It depends
> on the current polarity of the modulation signal.
> You *could* detect this polarity with a comparator, of course.
> And 3 exor gates might select reset or preset.
>
> JH.