"new" dual transistors

[Rene Schmitz]

At 13:54 09.09.99 +0200, you wrote:
>Maybe it is not such a bad idea to review my quiet, but drifting
>multiplier, the use of such dual transistors should give lower drift
>for at least one input (two inputs would mean quadruple npn, which we
>have not).

MAT04 ;-$ 

>Btw.: would it be suitable to use a quadruple MOSFET array for the
>multiplier core? I think so. AFAIK the core operates in the "linear"
>region anyway, the exponential bipolar properties are avoided. It is
>harder to use MOSFETS and bipolar on one chip, but discrete things are
>no problem.

To avoid drift you'd have to use monolithic devices. Dual (matched) mosfets
should be hard to get. But maybe the Japanese have such a device in stock
for us ;-)

>One can develop back such a four quadrant multiplier to a two quadrant
>type, we call this vca. Example: http://www.uni-bonn.de/~uzs159/vca.gif.

An other example would be the minivca.

>
>Wouldn't it be interesting to use a loging input stage, or a MOSFET pair
>for/in the transconductance stage? Rene?
>

The question would be what the maximum input signal swing for these would
be. If it was more than the +/-25mV for the OTA / BJT diffamp then this
would mean we can use less input attenuation, and improve SNR. One should
as well try it with a JFET pair. Maybe drift is not such an important issue
here with bigger signal voltages. 

Bye
 René


error:asciiartisnotfully  \ uzs159 at uni-bonn.de
supportedwithyourcurrent   \ http://www.uni-bonn.de/~uzs159
displaydriversettings...    \ http://members.xoom.com/Rene_Schmitz