expo mix up

[jhaible]

> >I sink the VCO/VCFs current in the transistor that has the control
> voltage applied. This is the same as the Formant and the ASM-1 I think.
> But the minimoog VCO uses the second one, with the op-amp's feedback
> going to the first.
>
> Sorry, this is the wrong way round. But the question remains the same.
> What advantages are there in doing it either way?

The first difference is the CV polarity, of course. If you have a certain
CV polarity (after a certain number of inverting adder stages, for instance)
and a given polarity of the expo converter (npn or pnp), you can choose
the right input of the converter to avoid an extra inverter stage.

The two inputs have different requirements for the driving impedance,
however. The "reference" transistor (in the feedback loop) can work
with a medium driving resistance, like the 1k (tempco) of a passive
resistor divider. The same resistor divider applied to the other, the "expo"
transistor will cause a remarkable HFT error. Why ? The external
impedance adds to the internal rB, which is transformed to an increased
rE. This will linearize the expo function at higher currents.

You can use the base of the "expo" transistor as an input, but then make
sure you drive it with a really low Z. (tempco resistor in the feedback
loop of an opamp ... which will - damn ! - change the polarity as well,
so you might just as well use the other input ..)
There are some configurations where it makes sense, though. I just
don't remember which they are.

JH.