Xilinx Gate Arrays

patchell patchell at teletrac.com
Sat May 15 18:39:16 CEST 1999


    Yesterday, at work, I had a "spare" hour, and plopped a 12 x 12 multiplier in an
XCS40 (spartan 20,000 gates) array and it occupied only 16% of the CLB (logic
blocks).  That ain't bad.  That is one of the things that really got wheels turning.

    -Jim

The Dark force of dance wrote:

> Y-ellow Jim 'n' y'all.
>         Though, given the way things are at the moment I'm largely dreaming. I had
> had similar thoughts about using VL gate arrays.
>
> Only I was thinking more along the lines of using ALTERA stuff. The reason
> being is that you can get off the ground very cheaply. Like for nothing if
> need be. The software is free.
>
> But the advantage of Xilinx, and I'm not entirely sure if I'm spoze to
> mention this or not but bugger it, is that you can re-program xilinx on the
> fly. And we're talking nano seconds here.
>
> What this means is that you could design several different accumulators for
> example. Each one designed especially for a specific kind of operation. Yet
> they can all share the same set of gates. You simply tell the array that
> this section of it will now look like this and then perform your
> operations. When the next operation comes along you can re-configure your
> hardware as required.
>
> Some friends of mine are currently engaged in finding new ways to improve
> the algorithms to do this. Obviously, to do this chip wide, efficiency is
> the key. But if you set asside enough gates to perform your biggest tasks,
> you could simply change the architecture on the fly.
>
> I was thinking for use as interpolating, multiplexing filters. Where you
> could change the filter type as the mux scans down through the output
> channels. Thus instead of rendering your filters as a DSP algorithm, you'd
> simply implement them in hardware and select them as the mux selects
> individual output (read "synth") channels. That kinda thing.
>
> Which would be best I have no idea but personally I couldn't afford to go
> down the xilinx path as it stands at the moment. Altera looks pretty simple
> and useable for relatively static designs.
>
> Hope this helps.
>
> Be absolutely Icebox.
>
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