PLL clock multiplier

[Tim Ressel]

Yo, 

Some microprocessors, like Motorola's 68PM302, use an on-board clock multiplier
which takes in 32 kHz and multiplies it up to 16 MHz. This can help EMC somewhat
by making the external oscillator low frequency, but since the uP is bouncing
its data lines and some of its address lines at the high speed, the reduction is
minimal.

These multipliers are nothing more than phase-locked loops with a VCO centered
on the frequency needed, and a divider to take it down to the reference
frequency. 

I have seen TTL can-style oscillators in that frequency range. In fact, I have
some 128 MHz TTL oscillators.


Tim Ressel -- Hardware DQ
Hewlett-Packard
Verifone Division
916-630-2541
tim_r1 at verifone.com


> ----------
> From: 	jbv[SMTP:jbv.silences at wanadoo.fr]
> Sent: 	Tuesday, June 29, 1999 2:46 PM
> To: 	synth-diy at mailhost.bpa.nl
> Subject: 	PLL clock multiplier
> 
> Hi guys,
> 
> I just found that there are some chips on the market that allow easy
> clock multiplying.
> 
> I had already noticed that some DSPs use that technique, especially to
> avoid electro-magnetic
> interferences for clock freq above 150 MHz.
> 
> Besides, these things are surprisingly cheap (less than 1 USD) !
> 
> For instance, in a project I'm working on, I need a 96 MHz clock source.
> I searched several
> components catalogs but didn't find that value. It looks like with those
> chips, I can simply
> use a standard 12 MHz Xtal and apply a x8 multiplier factor...
> 
> Has anybody tried this ?
> 
> More info at www.microclock.com (look for ICS501°.
> 
> jbv
>