Unused CMOS inputs

[Phillip L. Harbison]

macdonald at evenfall.com wrote:
> I have read that it is good practice to ground unused CMOS inputs to
> prevent unintended behaviors.  Is it also acceptable to set them to
> V+ or V-? [...]

You can tie unused inputs to either the highest or lowest potential
on the chip (Vss or Vdd).  The reason you do this is to reduce
current.  All push-pull outputs dissipate current when the output
switches and both the upper and lower transistor are turned on
simultaneously.  In CMOS logic, this is the primary cause of power
consumption.  If you leave an input floating, there is a good
chance that output will remain in this transition state and draw
lots of current and dissipate lots of heat.

There are several ways to deal with unused inputs.  You could tie
the inputs directly to Vcc or GND; however, I've found that when I
do this the board layout people tie the pins directly to the power
planes.  This makes it difficult to make changes when debugging
the board as you have to literally pull the pin out of the hole to
break the connection.  I prefer to connect inputs to Vcc or GND
through a resistor when using CMOS.  That way you only have to cut
a small trace if you need to use the input.

This does not work quite as well for TTL inputs that need to be
tied low.  To guarantee a low input, you need to use a fairly
small resistor and that means higher input current.  For TTL low
inputs, I find a spare inverter and tie the input to Vcc through
a resistor.  I then tie the output to the TTL input.  This reduces
current and guarantees a reliable low logic level.

-- 
*name: Phil Harbison
*path: alvitar at xavax.com