seq2 text

tomg vco at mindspring.com
Sat Jun 19 11:32:06 CEST 1999


As promised here is the sequencer text.....

The 3x16 idea works fine but there are close to 120 wires!
...so I guess we will be doing a much easier to deal with 1x16.
If you want 3x16 build 3. Or more if you want. The boards will
be cheaper. Given that. I though my wants were pretty simple...

:16x1 - glide, pitch, trigger-out and on/off per note
:master pitch 
:gate-out sum w/adjustable width
:trigger-out sum
:set last note 1-16
:set # of repetitions 1-10 or infinite
:select up/down/up-down sequence
:vc start/stop
:carry-out trigger - activated on any stop

A 4069 or 4011 clock into a 4516 binary up/down counter driving
a 4514 4 bit latch/line decoder. This gives us 16 sequential 
outputs. Works great! Now let's screw around with it.

PROBLEM 1:
I couldn't find a source for a 1p16t rotary so last note
is a 1p8t and selectable by 2s 2-16. The up/down function was
solved with 1/4 of a 4043 quad NOR r/s latch which was cool 
because I could use the the other 3/4s to build a radio select 
switch. 

PROBLEM 2:
The down-mode...is a problem still unsolved -> in order to go
down you must first be somewhere on the way up. You can NOT
start going down. This also causes the down-mode to ignore the
last-note setting. I could fix it with some fancy switching but
at least 4 chips...it's still a problem. I could leave it out
or just leave it screwed up. Up and up/dn are fine...well the
truth is, if you have the rep-counter turned on it stops on the
up sequence when it reaches 16, not when it gets to 1...ie -
if you set it for 3 reps it plays 2 up/dn then 1 up and stops.
That's also a problem solved only by many chips...sigh

PROBLEM 3:
The last note played was the one before the stop setting. I
added a inverter/cap so it waits to go positive one more clock
edge ...easy.

PROBLEM 4:
Select-mode and seq-suspend..I use a 4052 to switch the input
to the 4516 u/d pin. Worked out because I could use the other
half to keep the 4017 from counting out....also easy

PROBLEM 5:
Gate and trigger out. This is where I stopped. In order to 
have gate or trigger it has to pulse with the clock. This
is bad for cv out.....because it pulses. So we need outputs 
1-16 to go two different places to the trigger/gate pulsed
and to the cv out NO-pulse. I could use 16 AND-gates ANDING
the clock, but I want to let it rest for a while. Who knows
that 10X8 array might start to look good. <- Thats a joke!
we are only going to do a 1X16, I may never design another!
...Well there is that 10X8 array, isn't there?

-tg

















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