JH's VCO, wavetable source

[harry bissell]

Harry Bissell writes:

I think what you have to do is still use the edge-sensitive phase comparator.
Yoy still need full lock range. If you have a step input, use some circuit to
"jam" the approximate DC voltage into the cap in the loop filter. Then let it
acquire. It will still go "sproing" but will settle quicker. Jitter is still
a problem.

The XOR detector will vary from +90 to -90 degrees when in lock, depending on
the error. This phase error may be a problem as it is variable. I assume the
phase error will be divided by the down counter (ie. 256) so it may only be a
small problem.

The PLL will still be "late" just like the digital counting method (which is
a form of PLL also).  A real good HF VCO is the best bet IM (and probably
others) HO.

:^)  Harry

Martin Czech wrote:

> Another idea:
>
> Well, PLLs like 4046 can go up to 4-10MHz (at least I read a spec sheet
> about that).  The problem is of course the "sproiiing" step response,
> or lag.  Now the typical pll is set up in a way that the vco is totally
> dumb, ie.  without closing the loop totally wrong. This need not be.
> You can do a high frequency oscillator with say 10% absolute maximum
> error to the ideal scale. That should be possible. If now a pll is added
> I guess the the loop gain can  be much smaller, or in other terms the
> corrective control voltage can be much smaller then usuall, because it
> doesn't have to be full scale.  The wide band comparator will still try
> to pull the vco to 0 Hz deviation.
>
> This way the vco will lock to the (xtal digital divider) frequency, but
> you can also do sweeps etc because the influence of the PLL is limited to
> a small pull. This will of course change the sweep characteristic a bit,
> I don't know if this will hurt. Maybe even the xor small band comparator
> will work, giving less jitter.
>
> m.c.
>
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