AW: PAIA Hex VCA circuit

Haible Juergen Juergen.Haible at nbgm.siemens.de
Mon Jan 18 13:21:37 CET 1999


I haven't seen the schemos (I'd like to see them, though!),
but here is a wild guess how it might work:
Use the GND connection as common output (you already 
said that), use the inverter inputs as CV inputs, and the inverter
outputs (!) as signal inputs. That way you would have a single
n-channel MOSFET (as VC resistor) between your signal
inputs (i.e. inverter outputs) and the common output (i.e. 
inverter GND). No idea *if* this works, but given the fact that
you can use the cip as hex vca, this might be the way to do it.
You'd best connect the "GND" output to a virtual GND (opamp)
summing node to avoid crossmodualtion between the individual 
signals.

Just a wild guess,

JH.

> ----------
> Von: 	Mark Smart[SMTP:smart at nn.com]
> Gesendet: 	Sonntag, 17. Januar 1999 23:30
> An: 	synth-diy at mailhost.bpa.nl
> Betreff: 	PAIA Hex VCA circuit
> 
> Hi everyone.
> 
> After forgetting about it for a year and a half, I have dived back into my
> GR-300 guitar synth hacking project. I have been messing with this circuit
> invented by PAIA which uses a 4049 CMOS chip to create six VCA's which mix
> into one output  (the output comes out the ground pin!). What I'm using
> this for is to mix together pulse and square waves derived from the
> GR-300's internal sawtooth waveform. My saw-to-pulse converter and octave
> dividers create three pulse waves which oscillate between 0 and +15 volts.
> 
> This circuit mostly works execpt that there is noticeable leakage between
> channels which is especially bad at low volumes. I have three
> signals, the pulse wave, the /2 square wave, and the /4 square wave. When
> you turn on the control voltage for the /4 square wave, it comes on, but
> with a noticeable amount of the /2 and pulse signals leaking in. I would
> appreciate the advice of anyone who is familiar with this PAIA hex VCA
> circuit. I could also post a schematic at some point maybe. I tried
> lowering the 4.7 Meg resistors to 2.2 Meg, and this helped some, but did
> not eliminate the problem. My biggest problem in debugging the circuit is
> that I really don't understand how it works very well. The description
> which came with it does not go into that much detail. It does not specify
> a
> limit on CV or audio voltage ranges. The basic idea of the circuit is that
> the FET's in the CMOS inverter gate are used as voltage-controlled
> resistors, and somehow the audio inputs mix inside the chip and come out
> the ground pin.
> 
> I would appreciate any advice. Also thanks to the people on the list who
> have helped me in the past in my sporadic forays into synth-building. 
> 
> 
> ************************************************
> *     Mark Smart                               *
> *     Electronics Engineer                     *
> *     And Musician                             *
> *     smart at medusa.nn.com                      *
> ************************************************
> 



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