AW: Opinions: On op amp replacement
Rene Schmitz
uzs159 at uni-bonn.de
Mon Feb 1 19:24:32 CET 1999
At 17:53 01.02.99 +0100, you wrote:
> >the FET-resistor buffer has a nonlinearity and offset drift! (I
>There are applications where matched FETs and a bipolar opamp are
>actually connected to form a FET input opamp - I'd say it's save to replace
>it here. (If the common mode range is not violated, that is.)
>Been there, done that, in my version of the ARP Quadra phaser. (schemos
>at my homepage)
This is what I meant!
>There are other circuits, like the FET buffer in the SEM-1a, where you have
>a source follower and an active load built from a second FET. That's another
>method to compensate for offset voltage (and drift) to some extend. And this
>circuit has one big advantage: it's faster than a general purpose opamp like
>the TL07x can be. I won't say that it hurts much to replace it in the SEM
>VCO.
I love that circuit, its a very elegant way to get rid of offsets and drift.
And if one connects the gate of the upper fet to the drain of the lower
fet, then you have a nice and very linear inverting amp. The signal is then
fed to the other gate.
What I was referring to was the FET buffers in the filter, where there are
a few
FET-resistor source followers followed by a 741. Here I would simply use a
jFET opamp.
>In fact, the first version of my SEM VCO clones were built with JFET opamps.
>But I changed them later to the discrete version. I'm too lazy to do valid
>A/B
>comparisons in such cases, but I wanted to point out that the discrete
>solution
>has some theoretical benefits, too. BTW, in an integrator / schmitt trigger
>loop
>such as a VCO, a little offset drift in the comparator section doesn't hurt
>at all.
>The thresholds are set in the schmitt trigger. My asumption is that Oberheim
>has used the active load because of linear slopes, and not offset drift in
>the first
>place.
A second thing is that the dual-FET follower is powered from 18.5V, so
there are no saturation effects when the integrating cap gets charged to 15V.
(I ran into this problem with my last VCO design....)
Bye
Rene
, : (uzs159 at uni-bonn.de)
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