DIY box for adding shuffle to a Sync Signal

[Dan Gendreau]

> Well, this sounds like the job for a few trusty CMOS chips, the 4046 and a
> 4024, trow in 2 caps and 3 resistors and you'd be set.
>
> I think I'd try the phase comparator II in the 4046, hooking the
> loop filter
> to output pin 13 and then into pin 9. The 4024 will be clocked from pin 4
> and a suitable tap is taken to feed the pin 3. Shaping the signal
> and feeding
> that into pin 14 and taping the output train at pin 4. Hook a cap between
> pin 6 and 7, and some suitable resistors for pin 11 and 12.

I think what you describe would produce a pulse train frequency that is a
multiple of the input train. ie. it would convert a 24ppq signal to 48ppq or
96ppq... This in itself would not generate a shuffle clock signal, but it
_would_ be useful in getting more clock resolution in the circuit I
described.

To do shuffle, we need to take a 24 pulse/quarternote pulse train and slow
down 6 pulses by a certain amount and speed up the next 6 pulses by the same
amount. While the average tempo remains the same, every 16th note is either
"faster" or "slower" than average. How much "faster" and "slower" is
controled by the amount of "shuffle" you want.

-Dan G.