EH 16 second dly

[Curtin, Steven D (Steven)]

I would think that in the case of the Deltalab Effectron, the first option
was used.  They probably just used an AND gate in series with the address
counters.   The simplest and cleanest way to modulate delay times or sample
frequencies is with a variable sample clock.  Some of the early samplers
such as the Prophet 2000 used a variable-clock scheme, but this isn't
cost-effective when you want 128 voices on a sampler.  

Later and current systems use a sample-interpolation scheme, where you keep
track of the current sample in memory and a sample "fraction", so you can
increment through memory by slightly less or more than an integer sample.
The problem with this is that simple linear interpolation has all kinds of
artifacts, and you start having to throw some serious processing resources
at fixing this.

Steve C

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Steven Curtin  
Lucent Technologies Microelectronics
ph: (732)949-4404   fax: (732)949-6711
http://www.emf.org/subscribers/curtin/
sdcurtin at lucent.com
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> Haible Juergen wrote:
> > Typically you have an "analogue" range (master clock modulation) of 2:1
> or
> > 4:1, and the rest is done with adress limitation.
> 
> I see two ways how this could be done.
> First is, use the same address for read and write; read first, then
> write. To control the delay time, the address counter is reset at a
> certain address. Is that what you mean with address limitation? Some
> ugly things happen when the delay time is changed: when the time is made
> shorter, the effect isn't audible until the next reset of the counter.
>