EH 16 second dly
Haible Juergen
Juergen.Haible at nbgm.siemens.de
Tue Dec 14 12:25:03 CET 1999
>When the delay time is controlled by the clock rate only, the range
>can't be very high. For short delay times high clock rates are
needed
>and the ADC becomes very expensive. Is it really done this way in
old
>digital delays? What is the delay time range?
>
>Ingo
Typically you have an "analogue" range (master clock modulation) of 2:1 or
4:1,
and the rest is done with adress limitation.
JH.
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