EH 16 second dly

[>>>marjan<<<]

> Do you mean with "delay process in software" that the delay time is set
> with the offset between read and write addresses rather than with the
> clock rate? This can be done with discrete logic too.
> 

So I run my audio thru Windoze and I get superb delay(s :)

> When the delay time is controlled by the clock rate only, the range
> can't be very high. For short delay times high  clock rates are needed
> and the ADC becomes very expensive. Is it really done this way in old
> digital delays? What is the delay time range?

Some DDLs used Delta Modulation, based on assumption you have high
sampling
rate and "slow" signal (audio) so next sample can be the same as
previous one
or one "step" up or down, so you need only 1.5 bit resolution. Used
DRAMs
to store data, which used to be expensive so you got short delays up
to 1 or 2 sec (I guess some has more). I have Ibanez dly with 900ms. It
uses
8 4116 16kx1 DRAMs.
EH 16 otoh uses standard ad conversion, 12bit but that's the part of the
schematic I can't read :) but DAC is 6012 ? Someone help me here...



marjan