AD Env.Gen. Building

[Jim Patchell]

Carlos Vila Deutschbein wrote:

> Hi to everyone!
> This is my first posting to this list, so let me introduce myself briefly:
> My name is Carlos and I'm from Barcelona (Spain). I'm studying Image&Sound
> Engineering here. I'm currently working on a project which involves
> building an ADSR Envelope Generator and analyzing it's effect on sound
> (not only time domain but also frequency domain). I'm also investigating
> on the relationship of different envelope curves for different
> harmonics...
>
> Well, to the point:
> I have a schematic taken from <http://surf.pangea.ca/~rmiller/ad.jpg>
> It is a simple AD EG from Barry Kleins Book. There are a couple of things
> I don't quite understand though:
>
> - The only NOR Gates I know work with 0/+5 Volts (CMOS logic?). So, at the
> Q output there can be max 5V and that's the voltage towards the capacitor
> C3 tends to charge. That fact doesn't fit into my equations because
> further on, this voltage is compared to 9.8V at IC A1, which it will never
> reach...(?!) In consequence, the decay phase never triggers....
>

    Real simple.  The CD4001B can have up to 18 volts on Vdd, so I would
imagine that in this circuit, Vdd is tied to +15.

    -Jim