SEM VCO buffer

[Martin Czech]

:::I thought I had checked that. But guess what ? I didn't find the schemos at
:::the 4093, and never went on to the 40106. There it is (;->).
:::I assume the hysteresis is just set by the "strength" of the first stage
:::overriding the second one. 
:::

Now I'm confused, waht is first and what is second ? I see on the LHS
two PMOS in series, below them two NMOST in series, a large "totem
pole". All gates are connected to the input. The structure looks like
a buffer inverter, an inverter that can go z. An additional PMOST is
now connected in the junction of the previous PMOST, and this is also
drawn at the NMOST side. If you draw it a bit different you will see
two strange differential amps, but the "current sources" are also gate
connected and go off for full scale input. No quiescent current then.
So the hysteresis comes from "differential amp action".

m.c.