temperature compensation.

[jhaible]

>I was reading EDN online article "Active Cancellation Of Potentiometer
>Wiper Resistance" (June 14) and it says "... the FETs' Ron temperature
>coefficients approach 3000 ppm/°C--five to ten times worse than typical
>resistance elements", the fact that I must have skipped during
>analog electronics lectures.
>So just a long shot, if you bias FET to open with some constant
>voltage and put it in voltage divider, could it make some sort of
>tempco, with some trimming to exact volt. div? Is it linear or not?
>What's typical FET Ron resistance (~100ohm?)
>Bad idea?
>
>marjan

Nice to see you back on the list, Marjan !

I thought it was rather some 2000 than 3000 ppm, but I don't know for sure.
I'm sure someone on the list has the data at hand, though.

This was used in some SSM chip (I think SSM2020) to make a partial
compenstion of the expo converter temp drift. For each VCA, there
was a npn pair (that could be configured as current mirror, or as expo
converter), and a low value silicon resistor that could be used as lower
leg of the usual resistor divider. As I said, I think it was only 2000ppm,
but then partial compensation is better than none. At least for less
critical applications like VCAs.

If we need higher tempco's, we can cascade two resistor divider stages
(with a buffer in between, and we might degenerate the tempco of one
of these stages (series or parallel resistor) to get an overall 3300ppm
(or whatever we want, below twice the individual tempco).
The problem might be the trimming required to compensate for
tolerances of the FET resistance. But maybe one 25 turn trimpot would
be good enough for two stages.

JH.